ARM Accredited Engineer EN0-001 Question # 50 Topic 6 Discussion

ARM Accredited Engineer EN0-001 Question # 50 Topic 6 Discussion

EN0-001 Exam Topic 6 Question 50 Discussion:
Question #: 50
Topic #: 6

An interrupt handler contains the following instruction sequence at the end. The purpose of these instructions is to clear the interrupt request in the interrupt controller and then safely re-enable interrupts.

STR r0, [r1] ; write to interrupt controller register to clear interrupt request

CPSIE i ; re-enable IRQ interrupts

Which of the following instructions should be placed at position in order to ensure that the interrupt controller sees the write before interrupts are re-enabled?


A.

DMB


B.

DSB


C.

ISB


D.

NOP


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