The correct answer is D. Dual channel .

In the CompTIA A+ Core 1 (220-1201) hardware objectives, memory bandwidth refers to the amount of data that can be transferred between RAM and the CPU in a given amount of time.

Dual channel memory architecture increases bandwidth by:

Allowing the memory controller to access two memory modules simultaneously

Effectively doubling the data transfer rate compared to single-channel configurations

Improving overall system performance, especially in memory-intensive tasks

Why the other options are incorrect:

A. CAS latency

CAS latency measures the delay before data is available after a request. Lower latency improves response time, but it does not significantly increase total bandwidth.

B. ECC

ECC (Error-Correcting Code) improves reliability by detecting and correcting errors, but it does not increase data transfer bandwidth.

C. High clock speed

Higher clock speed does increase bandwidth, but not as significantly as enabling dual channel , which allows parallel data transfer paths and provides a greater overall increase.

Final Answer: D. Dual channel